Chip Architect Digital Engineer - Switzerland, US or UK
- Employer
- MicroTECH Global Ltd
- Location
- UK
- Salary
- Competitive
- Closing date
- 24 Jun 2022
View more
- Sector
- Engineering
- Contract Type
- Permanent
- Hours
- Full Time
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JOB AD:
Our client is a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. If you love to be part of a start-up that is challenging established tech giants and you are a proactive problem-solver, able to multitask in a high energy environment and someone who is motivated by pushing their limits and challenging the status quo, we have just the opportunity for you.
They are actively seeking a resourceful Chip Architect Digital either based in US, or Lausanne (CH) or Northampton/Reading (UK).
Key responsibilities
- Write and own content of specifications at chip, block and interface level.
- Working closely with analog, digital and verification teams to ensure design meets architecture specifications including review and sign-off authority regarding deviations from specification.
- Participate in standards bodies and represent company interests in those bodies.
- Responsibility for digital design and debug of assigned logic blocks (when appropriate).
- Work on cross-functional teams to implement improvement actions to optimise design cost, quality and /or schedule as appropriate.
Your profile
- Bachelor of Engineering in Electronics and Electrical Engineering (equivalent or higher).
- 10+ years of experience in the semiconductor industry.
- Proven experience with PCIe, USB and/or DP protocols, system architectures and ecosystems.
- -Proven experience with decomposing and partitioning specifications between analog and digital domains to optimize design architecture.
- Experience writing specifications at the chip and block levels and writing interface specifications for interfaces external and internal to the chip.
- Experience in leading and working with teams across different geographical sites.
- Experience with representing the design team and presenting to customers.
Competencies
- Design experience with high-level protocol standards )PCIe, USB, DP preferred).
- Familiarity with Serdes architectures and associated analog circuits.
- Proficient at writing algorithms for digital control of analog training functions.
- Knowledge of digital and analog design flows.
- Proficient at digital design using Verilog and/or VHDL.
- Proficient debug skills to identify bugs in architecture, algorithms, functionality and performance.
- Demonstrated team building and leadership skills, including working with cross-functional teams.
- Must possess strong communication skills including the ability to write specifications and internal/external presentations
Our client is a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. If you love to be part of a start-up that is challenging established tech giants and you are a proactive problem-solver, able to multitask in a high energy environment and someone who is motivated by pushing their limits and challenging the status quo, we have just the opportunity for you.
They are actively seeking a resourceful Chip Architect Digital either based in US, or Lausanne (CH) or Northampton/Reading (UK).
Key responsibilities
- Write and own content of specifications at chip, block and interface level.
- Working closely with analog, digital and verification teams to ensure design meets architecture specifications including review and sign-off authority regarding deviations from specification.
- Participate in standards bodies and represent company interests in those bodies.
- Responsibility for digital design and debug of assigned logic blocks (when appropriate).
- Work on cross-functional teams to implement improvement actions to optimise design cost, quality and /or schedule as appropriate.
Your profile
- Bachelor of Engineering in Electronics and Electrical Engineering (equivalent or higher).
- 10+ years of experience in the semiconductor industry.
- Proven experience with PCIe, USB and/or DP protocols, system architectures and ecosystems.
- -Proven experience with decomposing and partitioning specifications between analog and digital domains to optimize design architecture.
- Experience writing specifications at the chip and block levels and writing interface specifications for interfaces external and internal to the chip.
- Experience in leading and working with teams across different geographical sites.
- Experience with representing the design team and presenting to customers.
Competencies
- Design experience with high-level protocol standards )PCIe, USB, DP preferred).
- Familiarity with Serdes architectures and associated analog circuits.
- Proficient at writing algorithms for digital control of analog training functions.
- Knowledge of digital and analog design flows.
- Proficient at digital design using Verilog and/or VHDL.
- Proficient debug skills to identify bugs in architecture, algorithms, functionality and performance.
- Demonstrated team building and leadership skills, including working with cross-functional teams.
- Must possess strong communication skills including the ability to write specifications and internal/external presentations
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