I am looking for an FPGA Design Engineer for an initial 6 month contract.
In this role you will be responsible to create FPGA Emulation builds for an IoT SoC. To achieve this you will be interacting with HW/SW stakeholders, and need a good understanding of digital design, troubleshooting/debugging FPGA builds, supporting SVE (System Validation Engineering) and FW team for running functional tests.
The scope of work will include preparing RTL for FPGA emulation, modifying ASIC RTL for equivalent FPGA memory blocks, clock structures and synthesizable analog models as required, interacting with FPGA DV team, running Xilinx synthesis and PAR and delivering FPGA builds to SVE team.Minimum Experience
The Ideal Candidate Would Also Have
- Bachelor of Engineering with good knowledge and experience of FPGA flow (on Xilinx or Altera devices),
- Verilog/System Verilog,
- RTL design,
- C, scripting languages like python, perl or tcl.
- Hands-on experience in Xilinx FPGAs and ASIC prototyping work and experience in writing low level C driver codes
Please get in touch with your latest CV to apply. This role will be based near Cambridge.