Senior Digital SoC Design Engineer

Recruiter
Enigma People Solutions
Location
Edinburgh Technopole
Posted
10 Feb 2018
Closes
15 Feb 2018
Sector
Engineering
Contract Type
Permanent
Hours
Full Time

Enigma People Solutions is looking for a senior digital SoC design professional to join our client's expanding team in Edinburgh, Scotland. The client is recognised world-wide as providing state-of-the-art motor control integrated circuits for automotive, industrial, commercial and computing applications.

In this position, you will be part of a growing and dynamic team that primarily focuses on developing mixed-signal motor drive IC’s for industry leading customers. You will be responsible for architecting and integrating an ARM-based uP system and you will gain exposure to the latest trends in automotive motors control performance requirements, architectures and implementations.

RESPONSIBILITIES

Analysis of design specifications

Architectural study of an ARM based subsystem to be integrated in a SOC

RTL design using Verilog language

Creation of test-benches and block level simulations

Digital and mixed-signal top-level simulations

Interface with physical implementation team for the definition of physical and timing constraints and discussion of test requirements

Design for testability

Qualifications

Essential:

Prospective candidates should have a PhD or Master degree (or equivalent) in Electronics or a related field and a solid experience with design in an embedded system.

Desirable:

Experience of ARM core integration in SOCs. This includes a strong knowledge of protocols for connecting CPUs, interconnect fabrics and peripherals together as well as knowledge of the various high level functions such as boot protocols, clocking, power, etc. required for large SOCs.

Experience in developing Verification environments in SV/UVM with the goal to build an optimized simulation environment to flush out bugs as quickly as possible to deliver a highly functional first silicon.

Experience in design and verification of the integration of peripheral IPs with the focus being on correctness of the interfaces and operation of the various full-chip SOC protocols.

Familiarity with Cadence toolsets.

Familiarity with DFT implementations such as scan, boundary scan and BIST techniques.

Familiarity with FPGA prototyping.

Skills, Knowledge and Aptitudes

Competent in digital design techniques

Knowledge of front-end RTL design using Verilog or VHDL

Experience in the specification and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog/System Verilog

Good verbal and written communication skills

Ability to work in a multi-cultural team environment

Candidates should also be able to demonstrate:

Good presentation skills in English and the ability to present information in a clear and concise manner

A high level of commitment and self-motivation

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