Digital IC Verification Engineer-Switzerland

Recruiter
IC Resources
Location
London (Greater)
Salary
€85000 - €100000 per annum
Posted
30 Nov 2017
Closes
08 Dec 2017
Sector
Engineering
Contract Type
Permanent
Hours
Full Time
Digital IC Verification EngineerSwitzerlandSalary 100-120k CHF depending on experience.
This is an opportunity for an experienced Digital IC Verification Engineer to join a rapidly expanding company based in the scenic and highly desired French speaking part of Switzerland.

Preferred Skills :
* Digital IC verification background with at least some Specman/SV UVM exposure
* Knowledge on Metrics driven verification including test planning and coverage closure
* Constrained random testbench development, SVA and formal verification is beneficial.
* Good scripting techniques and regression set-up and management
* Experience on mixed signal verification and behavioural modelling is an added bonus

You will be self motivated with strong sense of ownership and responsibility. Good communication skills in English are ideal with knowledge in the French language an asset.
Key words: Digital, IC, ASIC, SOC, Verification, Engineer, Specman, SystemVerilog, UVM, OVM, SVA, assertions, formal, mixed-signal, AMS, Location: French speaking part of Switzerland.
This job was originally posted as www.totaljobs.com/job/77586168